New Trend: Why Choosing 1/3-cut Solar Cell ?

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Contents:

1.Why Cut Solar Cells?

2.The Principles of Cutting

3.Advantages of 1/3 Cut Panels over Half-Cut Panels

4.Why Don't Manufacturers Produce 1/4-Cut or Even 1/5-Cut Solar Cells?

5.Conclusion

Why Cut Solar Cells?

In recent years, photovoltaic (PV) technology has rapidly advanced and become widely used. The demand for high-power solar panels is increasing, and reducing energy loss while boosting the output power of these panels has become a focus for manufacturers worldwide. Cutting solar cells is a technique used to enhance panel efficiency by making the cells smaller, which reduces resistance and improves power output.

But why has cutting solar cells only recently become a popular topic in the industry? One reason is the increase in the size of silicon wafers from 156mm (M1) to 161.7mm (M4). This size increase has boosted the wafer area and current by about 7%, but it also increased electrical losses by 15%. This spurred the industry to find ways to reduce current-related losses. Additionally, cutting cells can reduce shading losses from the cell's metal electrodes and increase the number of busbars, which helps improve current flow.

Moreover, advancements in wafer and cell manufacturing processes now allow for the screening of full-size cells without the need to re-measure cut cells after they are divided. This streamlines the production process, making it more efficient and cost-effective.

In summary, cutting solar cells into smaller pieces helps make solar panels more powerful and efficient, meeting the growing demand for high-performance solar energy solutions.

Why Cut Solar Cells?

Principles of Cutting Solar Cells

1. Cutting Process

  • Squaring the Silicon Ingot: Processing the silicon ingot into a block that meets required specifications.
  • Silicon Block Cutting and Grinding: Removing the ends and flattening, chamfering, and rounding the silicon block.
  • Silicon Block Gluing: Bonding the silicon block to a workpiece plate in preparation for wire cutting.
  • Silicon Block Cutting: Using a multi-wire saw to cut the silicon block into thin silicon wafers.
  • Silicon Wafer Cleaning: Cleaning the wafer surface of slurry through pre-cleaning, inserting, and ultrasonic cleaning.
  • Silicon Wafer Sorting and Packaging: Grading the wafers according to standards and packaging them for storage.
 Cutting Process

2. Cutting Techniques

LSC - Laser Scribing and Cleaving

This technique relies on laser ablation technology. Half-cut cell technology typically employs laser cutting, where standard-sized solar cells are sliced vertically along the main busbars into two equal halves. These halves are then interconnected through welding for series connection.Here’s how it works:

Process: A laser creates full-length scribe lines along the edges of the half-cut cell. In some cases, the scribing doesn’t fully separate the cell but leaves a groove about half the cell’s thickness. The cell is then mechanically broken along these scribe lines.

Advantages: This method avoids creating shunt pathways in the p-n junction by performing the scribing from the back of the cell. For Passivated Emitter and Rear Contact (PERC) cells with a complete rear metal layer, creating a small opening on the back doesn’t cause any power loss.

Innovations: Fraunhofer CSP has developed and patented an advanced version of the LSC technique. This involves applying laser scribing to slightly bent solar cells, achieving a one-step process where scribing and breaking occur in the same station.

TMC - Thermal Mechanical Cleaving

Unlike LSC, TMC doesn’t use ablation techniques that can cause microcracks. Instead, it applies a highly concentrated thermal gradient along the edge of the half-cut cell, inducing localized mechanical stress that results in cracking.

Process: By applying a thermal gradient, the material undergoes local mechanical stress that leads to cracking without ablating the material.

Advantages: TMC processes don’t involve ablation and reduce overall thermal side effects, which minimizes structural damage to the wafers when process parameters are optimized.

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